Chip design is becoming an AI problem, and now AI is being asked to help design the chips it depends on. OpenAI and Synopsys have formed a multiyear partnership to develop GPT-Synopsys, a model intended to reason about chip design and work directly with Synopsys engineering software, while engineers set goals and review its output.
From prompts to engineering tools
GPT-Synopsys is planned as more than a chatbot for chip designers. The companies aim for it to interact with Synopsys tools, putting some of the work inside the software engineers already use rather than leaving the model to offer suggestions from the sidelines.
The intended division of labor is clear enough: engineers define what they want, then check and approve what the model produces. That is meaningful automation, but not a plan to remove human responsibility from the design process. Someone still has to decide whether the result is acceptable, which is often the part that matters most.
The partnership is still in development. Early tests with semiconductor manufacturers are underway, but no performance results or product release schedule were provided.
Data and commercialization
The model will run on OpenAI’s computing infrastructure. The companies say customer data will be encrypted and will not be used to further train the model, a relevant assurance for semiconductor firms working with sensitive designs.
OpenAI and Synopsys plan to sell the product together and share revenue. The announcement does not specify pricing or explain how the commercial arrangement will work in practice.
Synopsys chief executive Sassine Ghazi sees AI as a way to speed up chip development. OpenAI co-founder Greg Brockman framed the partnership as a path toward better chips and more capable AI. The two ambitions reinforce each other: better chips can support AI systems, while AI tools may help shorten the work required to design those chips.
A response to growing compute demand
The partnership arrives as demand for computing power to train and run AI models grows faster than the industry can supply new chips. Faster design cycles could help narrow that gap, though software assistance cannot by itself make manufacturing capacity appear. GPT-Synopsys is aimed at one stage of a much larger supply chain.
OpenAI is already involved in semiconductor work beyond this agreement. It is working with Broadcom on chips tailored for AI models, and its recently introduced Jalapeno chip has been described as competitive with specialized alternatives. The Synopsys partnership takes a different route, applying AI to the design process rather than only to the chips themselves.
What remains to be shown
The proposal has an attractive logic: chip design is demanding work, Synopsys makes tools used for that work, and OpenAI builds AI models that could operate those tools. The practical test is whether GPT-Synopsys can produce useful results inside real engineering workflows, with enough accuracy for engineers to trust its suggestions and enough transparency for them to review them.
For now, the companies have described the direction, the infrastructure and the commercial plan. They have not shared test results or shown how much time the system might save. The engineer remains in the loop, which is reassuring. The more consequential question is what the loop will look like once the model starts doing the work.